PZ5064I12A68-T
EE PLD, 14.5ns, CMOS, PQCC68Manufacturer: Xilinx
Categories: Programmable Logic Devices
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The Xilinx PZ5064I12A68-T is an electrically erasable (EE) Programmable Logic Device (PLD) from the PZ5064 series. This CMOS component features 64 macrocells and a maximum clock frequency of 67 MHz. It offers a propagation delay of 14.5 ns, with 52 input lines and 48 output lines, providing a flexible organization of 2 dedicated inputs and 48 I/O lines. The device operates within a supply voltage range of 4.5V to 5.5V and supports an operating temperature range of -40°C to 85°C. Housed in a 68-terminal J-bend chip carrier package (S-PQCC-J68), this surface-mount component is suitable for applications in industrial control, telecommunications, and consumer electronics.
Additional Information
Series: PZ5064RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Width | 24.2316 |
| Technology | CMOS |
| Length | 24.2316 |
| Additional_Feature | 64 MACROCELLS |
| Clock_Frequency_Max | 67.00000 |
| JESD_30_Code | S-PQCC-J68 |
| Number_of_Dedicated_Inputs | 2 |
| Number_of_I_O_Lines | 48 |
| Number_of_Inputs | 52 |
| Number_of_Outputs | 48 |
| Number_of_Terminals | 68 |
| Operating_Temperature_Max | 85.0 |
| Operating_Temperature_Min | -40.0 |
| Organization | 2 DEDICATED INPUTS, 48 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | QCCJ |
| Package_Equivalence_Code | LDCC68,1.0SQ |
| Package_Shape | Square |
| Package_Style | CHIP CARRIER |
| Programmable_Logic_Type | EE PLD |
| Propagation_Delay | 14.500 |
| Seated_Height_Max | 4.5700 |
| Supply_Voltage_Max | 5.50000 |
| Supply_Voltage_Min | 4.50000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | Yes |
| Terminal_Form | J BEND |
| Terminal_Pitch | 1.270 |
| Terminal_Position | QUAD |
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