PZ5064-10A68-T
EE PLD, 12.5ns, CMOS, PQCC68Manufacturer: Xilinx
Categories: Programmable Logic Devices
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The Xilinx PZ5064-10A68-T is an electrically erasable (EE) Programmable Logic Device (PLD) from the PZ5064 series. This CMOS component features 64 macrocells and operates with a propagation delay of 12.5 ns. It supports a maximum clock frequency of 77 MHz and is housed in a 68-terminal PQCC (Plastic Quad Flat Chip Carrier) package with a square shape and J-bend terminals on a 1.270 mm pitch. The device offers 52 total inputs, including 2 dedicated inputs, and 48 I/O lines. Designed for surface mounting, it operates within a temperature range of 0°C to 70°C and requires a supply voltage between 4.75V and 5.25V, with a nominal voltage of 5V. This device finds application in various industrial automation, telecommunications, and consumer electronics systems.
Additional Information
Series: PZ5064RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Width | 24.2316 |
| Technology | CMOS |
| Length | 24.2316 |
| Additional_Feature | 64 MACROCELLS |
| Clock_Frequency_Max | 77.00000 |
| JESD_30_Code | S-PQCC-J68 |
| Number_of_Dedicated_Inputs | 2 |
| Number_of_I_O_Lines | 48 |
| Number_of_Inputs | 52 |
| Number_of_Outputs | 48 |
| Number_of_Terminals | 68 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 2 DEDICATED INPUTS, 48 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | QCCJ |
| Package_Equivalence_Code | LDCC68,1.0SQ |
| Package_Shape | Square |
| Package_Style | CHIP CARRIER |
| Programmable_Logic_Type | EE PLD |
| Propagation_Delay | 12.500 |
| Seated_Height_Max | 4.5700 |
| Supply_Voltage_Max | 5.25000 |
| Supply_Voltage_Min | 4.75000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | Yes |
| Terminal_Form | J BEND |
| Terminal_Pitch | 1.270 |
| Terminal_Position | QUAD |
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