PZ5064-10A68
EE PLD, 12.5ns, 64-Cell, CMOS, PQCC68Manufacturer: Xilinx
Categories: Programmable Logic Devices
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Xilinx PZ5064-10A68 is a 64-macrocell Electrically Erasable Programmable Logic Device (EE PLD) from the PZ5064 series. This CMOS component features a propagation delay of 12.5ns and operates at a nominal supply voltage of 5V. The device is packaged in a 68-terminal PQCC (Plastic Quad Flat Chip Carrier) with a square package shape and J-bend terminals on a 1.270mm pitch. Designed for surface mounting, it operates within a temperature range of 0°C to 70°C. This component is utilized in industrial control, telecommunications, and data acquisition systems.
Additional Information
Series: PZ5064RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Technology | CMOS |
| Additional_Feature | No |
| In_System_Programmable | No |
| JESD_30_Code | S-PQCC-J68 |
| JTAG_BST | No |
| Number_of_Macro_Cells | 64 |
| Number_of_Terminals | 68 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | QCCJ |
| Package_Equivalence_Code | LDCC68,1.0SQ |
| Package_Shape | Square |
| Package_Style | CHIP CARRIER |
| Programmable_Logic_Type | EE PLD |
| Propagation_Delay | 12.500 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | Yes |
| Terminal_Form | J BEND |
| Terminal_Pitch | 1.270 |
| Terminal_Position | QUAD |
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