PZ3960C7EB
Loadable PLD, 10ns, 960-Cell, CMOS, PBGA492Manufacturer: Xilinx
Categories: Programmable Logic Devices
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The Xilinx PZ3960C7EB is a loadable PLD from the PZ3960 series, featuring 960 macrocells and a 10ns propagation delay. This CMOS device operates within a 0°C to 70°C temperature range and is housed in a 492-terminal PBGA (S-PBGA-B492) package with a 1.27mm terminal pitch. It supports JTAG Boundary Scan (JTAG_BST) and is designed for surface mounting. The component's 3.3V nominal supply voltage and its robust construction make it suitable for applications in industrial automation, telecommunications, and consumer electronics.
Additional Information
Series: PZ3960RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Technology | CMOS |
| Additional_Feature | No |
| In_System_Programmable | No |
| JESD_30_Code | S-PBGA-B492 |
| JTAG_BST | Yes |
| Number_of_Macro_Cells | 960 |
| Number_of_Terminals | 492 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | BGA |
| Package_Equivalence_Code | BGA492,26X26,50 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY |
| Programmable_Logic_Type | LOADABLE PLD |
| Propagation_Delay | 10.000 |
| Supply_Voltage_Nom | 3.3 |
| Surface_Mount | Yes |
| Terminal_Form | Ball |
| Terminal_Pitch | 1.270 |
| Terminal_Position | Bottom |
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