PZ3320N8YY
Loadable PLD, 9.5ns, CMOS, PBGA256Manufacturer: Xilinx
Categories: Programmable Logic Devices
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The Xilinx PZ3320N8YY is a loadable PLD from the robust PZ3320 series. This CMOS component features a propagation delay of 9.5 ns and operates within a supply voltage range of 2.97 V to 3.63 V, with a nominal voltage of 3.3 V. It is housed in a 256-ball PBGA (S-PBGA-B256) package, a square grid array with bottom-positioned ball terminals. The device offers 192 I/O lines and is designed for surface mounting. Its operating temperature range spans from -40°C to 85°C. This component finds application in various industrial, communication, and consumer electronics systems requiring flexible logic implementation.
Additional Information
Series: PZ3320RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Technology | CMOS |
| Clock_Frequency_Max | 91.00000 |
| JESD_30_Code | S-PBGA-B256 |
| Number_of_I_O_Lines | 192 |
| Number_of_Terminals | 256 |
| Operating_Temperature_Max | 85.0 |
| Operating_Temperature_Min | -40.0 |
| Organization | 192 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | BGA |
| Package_Shape | Square |
| Package_Style | GRID ARRAY |
| Programmable_Logic_Type | LOADABLE PLD |
| Propagation_Delay | 9.500 |
| Supply_Voltage_Max | 3.63000 |
| Supply_Voltage_Min | 2.97000 |
| Supply_Voltage_Nom | 3.3 |
| Surface_Mount | Yes |
| Terminal_Form | Ball |
| Terminal_Position | Bottom |
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