PZ3064I12A68
EE PLD, 14.5ns, 64-Cell, CMOS, PQCC68Manufacturer: Xilinx
Categories: Programmable Logic Devices
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The Xilinx PZ3064I12A68 is a CMOS EE PLD from the PZ3064 series, featuring 64 macrocells and a propagation delay of 14.5 ns. This component is housed in a 68-terminal PQCC (Plastic Quad Flat Pack) package, specifically a square chip carrier with J-bend terminals on a 1.270mm pitch. Operating within a temperature range of -40°C to +85°C, it utilizes a nominal supply voltage of 3.3V. This device is suitable for surface mounting. Applications for this type of programmable logic device are found in industrial controls, telecommunications infrastructure, and consumer electronics.
Additional Information
Series: PZ3064RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Technology | CMOS |
| Additional_Feature | No |
| In_System_Programmable | No |
| JESD_30_Code | S-PQCC-J68 |
| JTAG_BST | No |
| Number_of_Macro_Cells | 64 |
| Number_of_Terminals | 68 |
| Operating_Temperature_Max | 85.0 |
| Operating_Temperature_Min | -40.0 |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | QCCJ |
| Package_Equivalence_Code | LDCC68,1.0SQ |
| Package_Shape | Square |
| Package_Style | CHIP CARRIER |
| Programmable_Logic_Type | EE PLD |
| Propagation_Delay | 14.500 |
| Supply_Voltage_Nom | 3.3 |
| Surface_Mount | Yes |
| Terminal_Form | J BEND |
| Terminal_Pitch | 1.270 |
| Terminal_Position | QUAD |
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