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PZ3064-10A68-T

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PZ3064-10A68-T

EE PLD, 12.5ns, CMOS, PQCC68

Manufacturer: Xilinx

Categories: Programmable Logic Devices

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The Xilinx PZ3064-10A68-T is an Electrically Erasable Programmable Logic Device (EE PLD) from the PZ3064 series. This CMOS device features 64 macrocells and a maximum clock frequency of 80 MHz. It offers 52 total inputs, including 2 dedicated inputs, and 48 I/O lines, enabling flexible system design. The propagation delay is rated at 12.5 ns, ensuring efficient signal processing. This component is housed in a 68-terminal plastic chip carrier package (PQCC68, JEDEC code S-PQCC-J68) with a terminal pitch of 1.270 mm, suitable for surface mounting. Operating within a temperature range of 0°C to 70°C, it supports a supply voltage from 2.97V to 3.63V, with a nominal voltage of 3.3V. Applications for this device span industrial control, telecommunications infrastructure, and consumer electronics.

Additional Information

Series: PZ3064RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:
Technical Details:
Length24.2316
Width24.2316
TechnologyCMOS
Additional_Feature64 MACROCELLS
Clock_Frequency_Max80.00000
JESD_30_CodeS-PQCC-J68
Number_of_Dedicated_Inputs2
Number_of_I_O_Lines48
Number_of_Inputs52
Number_of_Outputs48
Number_of_Terminals68
Operating_Temperature_Max70.0
Operating_Temperature_Min0.0
Organization2 DEDICATED INPUTS, 48 I/O
Output_FunctionMACROCELL
Package_Body_MaterialPLASTIC/EPOXY
Package_CodeQCCJ
Package_Equivalence_CodeLDCC68,1.0SQ
Package_ShapeSquare
Package_StyleCHIP CARRIER
Programmable_Logic_TypeEE PLD
Propagation_Delay12.500
Seated_Height_Max4.5700
Supply_Voltage_Max3.63000
Supply_Voltage_Min2.97000
Supply_Voltage_Nom3.3
Surface_MountYes
Terminal_FormJ BEND
Terminal_Pitch1.270
Terminal_PositionQUAD

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