PZ3064-10A68
EE PLD, 12.5ns, 64-Cell, CMOS, PQCC68Manufacturer: Xilinx
Categories: Programmable Logic Devices
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The Xilinx PZ3064-10A68 is an electrically erasable Programmable Logic Device (EE PLD) from the PZ3064 series. This component features 64 macrocells and operates with a nominal supply voltage of 3.3V. It utilizes CMOS technology and offers a propagation delay of 12.5ns. The device is housed in a 68-terminal PQCC (Plastic Quad Flat Chip) package, specifically a J-lead square chip carrier with a terminal pitch of 1.270mm. With a JESD-30 code of S-PQCC-J68 and a package code of QCCJ, it is designed for surface mounting. The operating temperature range for this component is 0°C to 70°C. This device finds application in various industrial and commercial systems requiring flexible logic implementation.
Additional Information
Series: PZ3064RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Technology | CMOS |
| Additional_Feature | No |
| In_System_Programmable | No |
| JESD_30_Code | S-PQCC-J68 |
| JTAG_BST | No |
| Number_of_Macro_Cells | 64 |
| Number_of_Terminals | 68 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | QCCJ |
| Package_Equivalence_Code | LDCC68,1.0SQ |
| Package_Shape | Square |
| Package_Style | CHIP CARRIER |
| Programmable_Logic_Type | EE PLD |
| Propagation_Delay | 12.500 |
| Supply_Voltage_Nom | 3.3 |
| Surface_Mount | Yes |
| Terminal_Form | J BEND |
| Terminal_Pitch | 1.270 |
| Terminal_Position | QUAD |
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