XC3064-50PG132B
Field Programmable Gate Array, 224 CLBs, 4000 Gates, 50MHz, 224-Cell, CMOS, CPGA132Manufacturer: Xilinx
Categories: Field Programmable Gate Arrays
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The Xilinx XC3064 series Field Programmable Gate Array (FPGA), part number XC3064-50PG132B, offers a CMOS technology implementation with 224 Configurable Logic Blocks (CLBs) and an equivalent gate count of 4000. This device operates at a maximum clock frequency of 50 MHz and features 224 logic cells. The XC3064-50PG132B is housed in a 132-pin Ceramic Pin Grid Array (CPGA) package, specified by JESD-30 code S-XPGA-P132, with a terminal pitch of 2.54 mm. It supports a supply voltage range of 4.5V to 5.5V, with a nominal value of 5V. The operational temperature range is -55°C to +125°C. This component is suitable for applications in telecommunications, industrial control, and aerospace and defense systems. The combinatorial delay of a CLB is a maximum of 14 ns.
Additional Information
Series: XC3064RoHS Status: RoHS CompliantManufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Technology | CMOS |
| Clock_Frequency_Max | 50.00000 |
| Combinatorial_Delay_of_a_CLB_Max | 14.0000000000000000 |
| JESD_30_Code | S-XPGA-P132 |
| Number_of_Equivalent_Gates | 4000 |
| Number_of_Inputs | 110 |
| Number_of_Logic_Cells | 224 |
| Number_of_Outputs | 110 |
| Number_of_Terminals | 132 |
| Operating_Temperature_Max | 125.0 |
| Operating_Temperature_Min | -55.0 |
| Organization | 224 CLBS, 4000 GATES |
| Package_Body_Material | Ceramic |
| Package_Code | PGA |
| Package_Equivalence_Code | PGA132,14X14 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY |
| Programmable_Logic_Type | FIELD PROGRAMMABLE GATE ARRAY |
| Screening_Level_Reference_Standard | 38535Q/M;38534H;883B |
| Supply_Voltage_Max | 5.50000 |
| Supply_Voltage_Min | 4.50000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | PIN/PEG |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Perpendicular |
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