SM61CD256-55JDM
Standard SRAM, 256KX1, 55ns, CMOS, CDIP24Manufacturer: Texas Instruments
Categories: SRAMs
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Texas Instruments SM61CD256-55JDM is a standard CMOS SRAM organized as 256K x 1 bits, offering a maximum access time of 55ns. This asynchronous memory device operates with a supply voltage range of 4.5V to 5.5V, featuring an automatic power-down capability to reduce consumption. The SM61CD256 series component utilizes separate I/O, providing a 3-state output characteristic. Housed in a 24-lead Ceramic Dual In-line Package (CDIP) with through-hole mounting, this part is suitable for applications requiring robust performance across a wide temperature range, from -55°C to +125°C. Its specifications make it applicable in industrial and military systems.
Additional Information
Series: SM61CD256RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Technology | CMOS |
| Access_Time_Max | 55.0000000000000000 |
| Additional_Feature | AUTOMATIC POWER-DOWN |
| I_O_Type | SEPARATE |
| JESD_30_Code | R-CDIP-T24 |
| Memory_Density | 262144.0000000000000000 |
| Memory_IC_Type | STANDARD SRAM |
| Memory_Organization | 256KX1 |
| Memory_Width | 1 |
| Number_of_Functions | 1 |
| Number_of_Ports | 1 |
| Number_of_Terminals | 24 |
| Number_of_Words | 262144.0000000000000000 |
| Number_of_Words_Code | 256k |
| Operating_Mode | Asynchronous |
| Operating_Temperature_Max | 125.0 |
| Operating_Temperature_Min | -55.0 |
| Output_Characteristics | 3-State |
| Output_Enable | No |
| Package_Body_Material | CERAMIC, METAL-SEALED COFIRED |
| Package_Code | DIP |
| Package_Equivalence_Code | DIP24,.6 |
| Package_Shape | Rectangular |
| Package_Style | IN-LINE |
| Parallel_Serial | Parallel |
| Supply_Current_Max | 120.000000000000000 |
| Supply_Voltage_Max | 5.50000 |
| Supply_Voltage_Min | 4.50000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | THROUGH-HOLE |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Dual |
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