TBP24SA81-55NP1
OTP ROM, 256X4, 35ns, TTL, PDIP18Manufacturer: Texas Instruments
Categories: OTP ROMs
Quality Control: Learn More
Texas Instruments TBP24SA81 series OTP ROM features a 256 words x 4-bit organization, providing a total memory density of 1024 bits. This asynchronous, parallel memory component operates with a maximum access time of 35ns and utilizes TTL technology. The TBP24SA81-55NP1 is housed in a plastic/epoxy, rectangular, dual in-line package (PDIP18) with 18 through-hole terminals on a 2.54mm pitch. It operates from a nominal supply voltage of 5V and has a maximum supply current of 130mA. The operating temperature range is 0°C to 70°C. This component is suitable for applications in industrial automation and consumer electronics requiring fixed program storage.
Additional Information
Series: TBP24SA81RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Technology | TTL |
| Access_Time_Max | 35.0000000000000000 |
| JESD_30_Code | R-PDIP-T18 |
| Memory_Density | 1024.0000000000000000 |
| Memory_IC_Type | OTP ROM |
| Memory_Organization | 256X4 |
| Memory_Width | 4 |
| Number_of_Functions | 1 |
| Number_of_Terminals | 18 |
| Number_of_Words | 2048.0000000000000000 |
| Number_of_Words_Code | 256 |
| Operating_Mode | Asynchronous |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | DIP |
| Package_Equivalence_Code | DIP18,.3 |
| Package_Shape | Rectangular |
| Package_Style | IN-LINE |
| Parallel_Serial | Parallel |
| Supply_Current_Max | 130.000000000000000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | THROUGH-HOLE |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Dual |
Request a Quote
Clients Also Buy
TBP24SA81J
OTP ROM, 64X8, 65ns, Bipolar, CDIP18
TBP24SA81MJ
OTP ROM, 1KX8, 90ns, Bipolar, CDIP18
TBP24SA81N
OTP ROM, 2KX8, 140ns, Bipolar, PDIP18