TBP24S81-55JP4
OTP ROM, 2KX16, 18ns, TTL, CDIP18Manufacturer: Texas Instruments
Categories: OTP ROMs
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Texas Instruments TBP24S81 series OTP ROM, part number TBP24S81-55JP4, offers a 2K x 16 memory organization with a 32,768-bit density. This TTL-compatible component features a maximum access time of 18ns and operates within a supply voltage range of 4.5V to 5.5V. The TBP24S81-55JP4 is housed in an 18-lead Ceramic DIP package (JESD30 code R-XDIP-T18) with through-hole mounting. Its operating temperature range is from 0°C to 70°C. This device is suitable for applications in industrial control, telecommunications, and consumer electronics requiring non-volatile program storage.
Additional Information
Series: TBP24S81RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Technology | TTL |
| Access_Time_Max | 18.0000000000000000 |
| JESD_30_Code | R-XDIP-T18 |
| Memory_Density | 32768.0000000000000000 |
| Memory_IC_Type | OTP ROM |
| Memory_Organization | 2KX16 |
| Memory_Width | 16 |
| Number_of_Functions | 1 |
| Number_of_Terminals | 18 |
| Number_of_Words | 2048.0000000000000000 |
| Number_of_Words_Code | 2k |
| Operating_Mode | Synchronous |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Package_Body_Material | Ceramic |
| Package_Code | DIP |
| Package_Equivalence_Code | DIP18,.3 |
| Package_Shape | Rectangular |
| Package_Style | IN-LINE |
| Parallel_Serial | Parallel |
| Supply_Voltage_Max | 5.50000 |
| Supply_Voltage_Min | 4.50000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | THROUGH-HOLE |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Dual |
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