TBP18S42JP4
OTP ROM, 512X8, 60ns, TTL, CDIP20Manufacturer: Texas Instruments
Categories: OTP ROMs
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Texas Instruments TBP18S42JP4 is a 512 x 8 bit One-Time Programmable (OTP) Read-Only Memory (ROM) device. This component offers a maximum access time of 60ns and operates with TTL compatible logic levels. The memory organization is 512 words by 8 bits, providing a total density of 4096 bits. Designed for asynchronous operation, the TBP18S42JP4 features a standard CDIP20 (Ceramic Dual In-line Package) with 20 through-hole terminals on a 2.54mm pitch. Its operating temperature range is from 0°C to 70°C, with a nominal supply voltage of 5V. This device is suitable for applications in industrial control systems and legacy embedded designs requiring fixed program storage.
Additional Information
Series: TBP18S42RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Technology | TTL |
| Access_Time_Max | 60.0000000000000000 |
| JESD_30_Code | R-XDIP-T20 |
| Memory_Density | 4096.0000000000000000 |
| Memory_IC_Type | OTP ROM |
| Memory_Organization | 512X8 |
| Memory_Width | 8 |
| Number_of_Functions | 1 |
| Number_of_Terminals | 20 |
| Number_of_Words | 512.0000000000000000 |
| Number_of_Words_Code | 512 |
| Operating_Mode | Asynchronous |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Package_Body_Material | Ceramic |
| Package_Code | DIP |
| Package_Equivalence_Code | DIP20,.3 |
| Package_Shape | Rectangular |
| Package_Style | IN-LINE |
| Parallel_Serial | Parallel |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | THROUGH-HOLE |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Dual |
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