MSP430F247TRGC
RISC Microcontroller, 16-Bit, FLASH, MSP430 CPU, 16MHz, CMOSManufacturer: Texas Instruments
Categories: Microcontrollers
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The Texas Instruments MSP430F247TRGC is a 16-bit RISC microcontroller featuring an MSP430 CPU operating at up to 16MHz. This CMOS device offers 32KB of FLASH program memory and 4KB of data RAM. It includes 48 I/O lines and a 64-terminal, 9mm square, very thin profile chip carrier (VQCCN) package with a 0.500mm terminal pitch. The device supports a supply voltage range of 3.0V to 3.6V and operates within an industrial temperature range of -40°C to 105°C. Integrated peripherals include ADC channels and PWM channels. This component is commonly utilized in applications within the industrial automation and consumer electronics sectors.
Additional Information
Series: MSP430F247RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Width | 9.0000 |
| Technology | CMOS |
| Speed | 16.00000000 |
| Length | 9.0000 |
| ADC_Channels | Yes |
| Address_Bus_Width | 0 |
| Bit_Size | 16 |
| Boundary_Scan | Yes |
| Clock_Frequency_Max | 16.0000000000000000 |
| CPU_Family | MSP430 |
| DAC_Channels | No |
| Data_RAM_Size | 4096 |
| DMA_Channels | No |
| External_Data_Bus_Width | 0 |
| JESD_30_Code | S-XQCC-N64 |
| Number_of_I_O_Lines | 48 |
| Number_of_Terminals | 64 |
| Operating_Temperature_Max | 105.0000 |
| Operating_Temperature_Min | -40.0000 |
| Package_Body_Material | UNSPECIFIED |
| Package_Code | VQCCN |
| Package_Equivalence_Code | LCC64,.35SQ,20 |
| Package_Shape | Square |
| Package_Style | CHIP CARRIER, VERY THIN PROFILE |
| Program_Memory_Size | 32768 |
| Program_Memory_Type | FLASH |
| Program_Memory_Width | 8 |
| PWM_Channels | Yes |
| Seated_Height_Max | 1.0000 |
| Supply_Voltage_Max | 3.6000 |
| Supply_Voltage_Min | 3.0000 |
| Supply_Voltage_Nom | 3.0000 |
| Surface_Mount | Yes |
| Terminal_Form | NO LEAD |
| Terminal_Pitch | 0.500 |
| Terminal_Position | QUAD |
| uPs_uCs_Peripheral_ICs_Type | MICROCONTROLLER, RISC |