TMX4C1026-12N
Nibble Mode DRAM, 1MX1, 120ns, CMOS, PDIP18Manufacturer: Texas Instruments
Categories: DRAMs
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The Texas Instruments TMX4C1026-12N is a 1M x 1 Nibble Mode DRAM, offering a 120ns maximum access time. This CMOS component operates asynchronously and features 3-state outputs. Designed with a PDIP18 package (JESD_30 Code: R-PDIP-T18), it utilizes through-hole mounting with a 2.54mm terminal pitch. The TMX4C1026 series memory IC type provides a memory density of 1Mbit and requires 512 refresh cycles. It operates within a supply voltage range of 4.5V to 5.5V, with a nominal 5V requirement. This component finds application in industrial control systems, telecommunications equipment, and legacy computing platforms.
Additional Information
Series: TMX4C1026RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 22.4800 |
| Width | 7.6200 |
| Technology | CMOS |
| Access_Mode | NIBBLE |
| Access_Time_Max | 120.0000000000000000 |
| JESD_30_Code | R-PDIP-T18 |
| Memory_Density | 1048576.0000000000000000 |
| Memory_IC_Type | NIBBLE MODE DRAM |
| Memory_Organization | 1MX1 |
| Memory_Width | 1 |
| Number_of_Functions | 1 |
| Number_of_Ports | 1 |
| Number_of_Terminals | 18 |
| Number_of_Words | 1048576.0000000000000000 |
| Number_of_Words_Code | 1M |
| Operating_Mode | Asynchronous |
| Output_Characteristics | 3-State |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | DIP |
| Package_Shape | Rectangular |
| Package_Style | IN-LINE |
| Refresh_Cycles | 512 |
| Seated_Height_Max | 5.0800 |
| Supply_Voltage_Max | 5.50000 |
| Supply_Voltage_Min | 4.50000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | THROUGH-HOLE |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Dual |
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