TMS4256-20JL
Page Mode DRAM, 256KX1, 200ns, MOS, CDIP16Manufacturer: Texas Instruments
Categories: DRAMs
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The Texas Instruments TMS4256-20JL is a 262,144-bit page mode dynamic random-access memory (DRAM) organized as 256K words by 1 bit. This MOS technology component features a 200ns maximum access time and operates with separate input/output. The device is housed in a 16-lead Ceramic Dual In-line Package (CDIP) with through-hole mounting. Designed for applications requiring high-density memory, it is commonly utilized in legacy computing systems, embedded control, and industrial automation where its specific performance characteristics and package type are critical. The TMS4256 series offers 256 refresh cycles to maintain data integrity.
Additional Information
Series: TMS4256RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Technology | MOS |
| Access_Time_Max | 200.0000000000000000 |
| I_O_Type | SEPARATE |
| JESD_30_Code | R-XDIP-T16 |
| Memory_Density | 262144.0000000000000000 |
| Memory_IC_Type | PAGE MODE DRAM |
| Memory_Organization | 256KX1 |
| Memory_Width | 1 |
| Number_of_Terminals | 16 |
| Number_of_Words | 262144.0000000000000000 |
| Number_of_Words_Code | 256k |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Output_Characteristics | 3-State |
| Package_Body_Material | Ceramic |
| Package_Code | DIP |
| Package_Equivalence_Code | DIP16,.3 |
| Package_Shape | Rectangular |
| Package_Style | IN-LINE |
| Refresh_Cycles | 256 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | THROUGH-HOLE |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Dual |
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