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TMS4256-12FML

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TMS4256-12FML

Page Mode DRAM, 256KX1, 120ns, NMOS, PQCC18

Manufacturer: Texas Instruments

Categories: DRAMs

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The Texas Instruments TMS4256-12FML is a 256K x 1 bit NMOS page mode DRAM with a maximum access time of 120ns. This component utilizes page mode access for enhanced performance and supports asynchronous operation. The memory organization is 256K words by 1 bit, offering a density of 262,144 bits. It features separate I/O and 3-state output characteristics. Refresh options include RAS only, CAS before RAS, and hidden refresh cycles, with 256 refresh cycles specified. The device operates within a supply voltage range of 4.5V to 5.5V, with a nominal voltage of 5V. Packaged in an 18-terminal PQCC (Plastic Leaded Chip Carrier) with J-bend terminals, this surface-mount component is suitable for applications in consumer electronics and industrial control systems.

Additional Information

Series: TMS4256RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:
Technical Details:
Length12.4460
Width7.3660
TechnologyNMOS
Access_ModePAGE
Access_Time_Max120.0000000000000000
Additional_FeatureRAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH
I_O_TypeSEPARATE
JESD_30_CodeR-PQCC-J18
Memory_Density262144.0000000000000000
Memory_IC_TypePAGE MODE DRAM
Memory_Organization256KX1
Memory_Width1
Number_of_Functions1
Number_of_Ports1
Number_of_Terminals18
Number_of_Words262144.0000000000000000
Number_of_Words_Code256k
Operating_ModeAsynchronous
Operating_Temperature_Max70.0
Operating_Temperature_Min0.0
Output_Characteristics3-State
Package_Body_MaterialPLASTIC/EPOXY
Package_CodeQCCJ
Package_Equivalence_CodeLDCC18,.33X.53
Package_ShapeRectangular
Package_StyleCHIP CARRIER
Refresh_Cycles256
Seated_Height_Max3.5300
Supply_Voltage_Max5.50000
Supply_Voltage_Min4.50000
Supply_Voltage_Nom5
Surface_MountYes
Terminal_FormJ BEND
Terminal_Pitch1.270
Terminal_PositionQUAD

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