PLC18V8Z25N
OT PLD, 25ns, PAL-Type, CMOS, PDIP20Manufacturer: NXP Semiconductors
Categories: Programmable Logic Devices
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The NXP Semiconductors PLC18V8Z25N is an OT PLD from the PLC18V8 series, offering 8 macrocells with a propagation delay of 25ns. This CMOS device features 8 dedicated inputs and 8 input/output lines, configurable for a total of 18 inputs. The architecture is PAL-type, providing 74 product terms. Key functional features include shared input/clock, register preload, and power-up reset. Operating within a 4.75V to 5.25V supply voltage range, this component is housed in a 20-pin PDIP package (R-PDIP-T20) suitable for through-hole mounting. Applications for this device span industrial automation, consumer electronics, and telecommunications infrastructure.
Additional Information
Series: PLC18V8RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 26.7300 |
| Width | 7.6200 |
| Technology | CMOS |
| Architecture | PAL-TYPE |
| Additional_Feature | 8 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK; REGISTER PRELOAD; POWER-UP RESET |
| Clock_Frequency_Max | 30.00000 |
| JESD_30_Code | R-PDIP-T20 |
| Number_of_Dedicated_Inputs | 8 |
| Number_of_I_O_Lines | 8 |
| Number_of_Inputs | 18 |
| Number_of_Outputs | 8 |
| Number_of_Product_Terms | 74 |
| Number_of_Terminals | 20 |
| Operating_Temperature_Max | 75.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 8 DEDICATED INPUTS, 8 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | DIP |
| Package_Equivalence_Code | DIP20,.3 |
| Package_Shape | Rectangular |
| Package_Style | IN-LINE |
| Programmable_Logic_Type | OT PLD |
| Propagation_Delay | 25.000 |
| Seated_Height_Max | 4.2000 |
| Supply_Voltage_Max | 5.25000 |
| Supply_Voltage_Min | 4.75000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | THROUGH-HOLE |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Dual |
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