P3C18V8ZIDB
OT PLD, 50ns, CMOS, PDSO20Manufacturer: NXP Semiconductors
Categories: Programmable Logic Devices
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The NXP Semiconductors P3C18V8ZIDB is a CMOS OT PLD with a propagation delay of 50ns. This device, part of the P3C18V8 series, features 8 macrocells, register preload, power-up reset, and one external clock. It offers 8 dedicated inputs and 8 I/O lines, organized for flexible routing. Operating from a 2.7V to 3.6V supply, with a nominal voltage of 3.3V, it supports a maximum clock frequency of 17MHz. The component is housed in a 20-lead PDSO package (JESD-30 Code: R-PDSO-G20) with a terminal pitch of 0.650mm, suitable for surface mounting. Its operating temperature range is -40°C to +85°C. Applications for this component include industrial controls and consumer electronics.
Additional Information
Series: P3C18V8RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 7.2000 |
| Width | 5.3000 |
| Technology | CMOS |
| Additional_Feature | 8 MACROCELLS; REGISTER PRELOAD; POWER-UP RESET; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK |
| Clock_Frequency_Max | 17.00000 |
| JESD_30_Code | R-PDSO-G20 |
| Number_of_Dedicated_Inputs | 8 |
| Number_of_I_O_Lines | 8 |
| Number_of_Terminals | 20 |
| Operating_Temperature_Max | 85.0 |
| Operating_Temperature_Min | -40.0 |
| Organization | 8 DEDICATED INPUTS, 8 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | SSOP |
| Package_Shape | Rectangular |
| Package_Style | SMALL OUTLINE, SHRINK PITCH |
| Programmable_Logic_Type | OT PLD |
| Propagation_Delay | 50.000 |
| Seated_Height_Max | 2.0000 |
| Supply_Voltage_Max | 3.60000 |
| Supply_Voltage_Min | 2.70000 |
| Supply_Voltage_Nom | 3.3 |
| Surface_Mount | Yes |
| Terminal_Form | Gull Wing |
| Terminal_Pitch | 0.650 |
| Terminal_Position | Dual |
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