P3C18V8ZIA
OT PLD, 50ns, CMOS, PQCC20Manufacturer: NXP Semiconductors
Categories: Programmable Logic Devices
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NXP Semiconductors P3C18V8ZIA, an 8-macrocell OT PLD, utilizes CMOS technology and operates with a 3.3V nominal supply voltage. This device features register preload, power-up reset, and a single external clock input. With 8 dedicated inputs and 8 I/O lines, it offers flexible macrocell output configuration. The PQCC20 package (JESD-30 Code S-PQCC-J20) with a 50ns propagation delay is suitable for applications requiring fast logic implementation within the industrial temperature range of -40°C to +85°C. This component finds use in various industrial and consumer electronics sectors where programmable logic is essential.
Additional Information
Series: P3C18V8RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Width | 8.9662 |
| Technology | CMOS |
| Length | 8.9662 |
| Additional_Feature | 8 MACROCELLS; REGISTER PRELOAD; POWER-UP RESET; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK |
| Clock_Frequency_Max | 17.00000 |
| JESD_30_Code | S-PQCC-J20 |
| Number_of_Dedicated_Inputs | 8 |
| Number_of_I_O_Lines | 8 |
| Number_of_Terminals | 20 |
| Operating_Temperature_Max | 85.0 |
| Operating_Temperature_Min | -40.0 |
| Organization | 8 DEDICATED INPUTS, 8 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | QCCJ |
| Package_Shape | Square |
| Package_Style | CHIP CARRIER |
| Programmable_Logic_Type | OT PLD |
| Propagation_Delay | 50.000 |
| Seated_Height_Max | 4.5700 |
| Supply_Voltage_Max | 3.60000 |
| Supply_Voltage_Min | 2.70000 |
| Supply_Voltage_Nom | 3.3 |
| Surface_Mount | Yes |
| Terminal_Form | J BEND |
| Terminal_Pitch | 1.270 |
| Terminal_Position | QUAD |
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