5962-8984102LA
EE PLD, 20ns, CMOS, CDIP24Manufacturer: NXP Semiconductors
Categories: Programmable Logic Devices
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NXP Semiconductors 5962-8984102LA is a CMOS EE PLD with a propagation delay of 20ns. This device, part of the 5962-8984102 series, features 11 dedicated inputs and 10 I/O lines, organized as 10 output macrocells. It operates within a supply voltage range of 4.5V to 5.5V, with a nominal value of 5V. The component is housed in a 24-terminal CDIP package (JESD-30 Code R-GDIP-T24), a ceramic, glass-sealed, rectangular in-line package suitable for through-hole mounting. With an operating temperature range of -55°C to +125°C, this component is designed for high-reliability applications, including aerospace, defense, and industrial control systems. Its 22 total inputs and 10 outputs provide flexibility for complex logic implementations.
Additional Information
Series: 5962-8984102RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 32.5100 |
| Width | 7.6200 |
| Technology | CMOS |
| Clock_Frequency_Max | 31.20000 |
| JESD_30_Code | R-GDIP-T24 |
| Number_of_Dedicated_Inputs | 11 |
| Number_of_I_O_Lines | 10 |
| Number_of_Inputs | 22 |
| Number_of_Outputs | 10 |
| Number_of_Terminals | 24 |
| Operating_Temperature_Max | 125.0 |
| Operating_Temperature_Min | -55.0 |
| Organization | 11 DEDICATED INPUTS, 10 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | CERAMIC, GLASS-SEALED |
| Package_Code | DIP |
| Package_Shape | Rectangular |
| Package_Style | IN-LINE |
| Programmable_Logic_Type | EE PLD |
| Propagation_Delay | 20.000 |
| Screening_Level_Reference_Standard | MIL-STD-883 |
| Seated_Height_Max | 5.0800 |
| Supply_Voltage_Max | 5.50000 |
| Supply_Voltage_Min | 4.50000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | THROUGH-HOLE |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Dual |
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