MPC5606SEVLQ
RISC Microcontroller, 32-Bit, FLASH, 64MHz, PQFP144Manufacturer: NXP Semiconductors
Categories: Microcontrollers
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The NXP Semiconductors MPC5606SEVLQ is a 32-bit RISC microcontroller featuring 1MB of FLASH program memory and 48KB of RAM. This component operates at a maximum clock frequency of 64MHz and is housed in a 144-pin LFQFP package with a 0.50mm terminal pitch. It offers extensive peripheral capabilities including ADC and PWM channels, along with DMA controllers. Designed for robust operation, it supports a temperature range from -40°C to 105°C and operates within a 1.08V to 1.32V supply voltage range. The MPC5606 series is utilized in automotive and industrial applications requiring high-performance processing and reliable control. It also includes boundary scan functionality for enhanced testability.
Additional Information
Series: MPC5606RoHS Status: Manufacturer Lead Time: Product Status: Active-UnconfirmedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 20.0000 |
| Speed | 64.00000000 |
| Width | 20.0000 |
| ADC_Channels | Yes |
| Address_Bus_Width | 0 |
| Bit_Size | 32 |
| Boundary_Scan | Yes |
| Clock_Frequency_Max | 16.0000000000000000 |
| DAC_Channels | No |
| Data_RAM_Size | 49152 |
| DMA_Channels | Yes |
| External_Data_Bus_Width | 0 |
| JESD_30_Code | S-PQFP-G144 |
| Number_of_I_O_Lines | 105 |
| Number_of_Terminals | 144 |
| Operating_Temperature_Max | 105.0000 |
| Operating_Temperature_Min | -40.0000 |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | LFQFP |
| Package_Equivalence_Code | QFP144,.87SQ,20 |
| Package_Shape | Square |
| Package_Style | FLATPACK, LOW PROFILE, FINE PITCH |
| Program_Memory_Size | 1048576 |
| Program_Memory_Type | FLASH |
| Program_Memory_Width | 8 |
| PWM_Channels | Yes |
| Supply_Voltage_Max | 1.3200 |
| Supply_Voltage_Min | 1.0800 |
| Supply_Voltage_Nom | 1.2000 |
| Surface_Mount | Yes |
| Terminal_Form | Gull Wing |
| Terminal_Pitch | 0.500 |
| Terminal_Position | QUAD |
| uPs_uCs_Peripheral_ICs_Type | MICROCONTROLLER, RISC |
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