MPC5605BVLL6R
RISC Microcontroller, 32-Bit, FLASH, 64MHz, CMOS, PQFP100Manufacturer: NXP Semiconductors
Categories: Microcontrollers
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NXP Semiconductors MPC5605BVLL6R is a 32-bit RISC microcontroller featuring an MPC5605 series architecture. This CMOS component offers 786KB of FLASH program memory and 65.5KB of RAM, operating at a maximum speed of 64MHz. It includes integrated ADC channels and DMA controllers, along with PWM capabilities. The device is supplied in a 100-terminal PQFP package with a 0.50mm terminal pitch, suitable for surface mounting. Operating within a temperature range of -40°C to 105°C, it supports supply voltages from 3.0V to 3.6V. This microcontroller finds application in automotive, industrial automation, and consumer electronics sectors. Boundary scan support is integrated.
Additional Information
Series: MPC5605RoHS Status: RoHS CompliantManufacturer Lead Time: Product Status: ActivePackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 10.0000 |
| Width | 10.0000 |
| Technology | CMOS |
| Speed | 64.00000000 |
| ADC_Channels | Yes |
| Address_Bus_Width | 0 |
| Bit_Size | 32 |
| Boundary_Scan | Yes |
| Clock_Frequency_Max | 16.0000000000000000 |
| DAC_Channels | No |
| Data_RAM_Size | 65536 |
| DMA_Channels | Yes |
| External_Data_Bus_Width | 0 |
| JESD_30_Code | S-PQFP-G100 |
| Number_of_I_O_Lines | 77 |
| Number_of_Terminals | 100 |
| Operating_Temperature_Max | 105.0000 |
| Operating_Temperature_Min | -40.0000 |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | QFP |
| Package_Equivalence_Code | QFP100,.63SQ,20 |
| Package_Shape | Square |
| Package_Style | FlatPack |
| Program_Memory_Size | 786432 |
| Program_Memory_Type | FLASH |
| Program_Memory_Width | 8 |
| PWM_Channels | Yes |
| Seated_Height_Max | 1.6000 |
| Supply_Voltage_Max | 3.6000 |
| Supply_Voltage_Min | 3.0000 |
| Supply_Voltage_Nom | 3.3000 |
| Surface_Mount | Yes |
| Terminal_Form | Gull Wing |
| Terminal_Pitch | 0.500 |
| Terminal_Position | QUAD |
| uPs_uCs_Peripheral_ICs_Type | MICROCONTROLLER, RISC |
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