MK10DN512ZVMD10R
RISC Microcontroller, 32-Bit, FLASH, CORTEX-M4 CPU, 100MHz, CMOS, PBGA144Manufacturer: NXP Semiconductors
Categories: Microcontrollers
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NXP Semiconductors MK10DN512ZVMD10R is a 32-bit RISC microcontroller featuring a Cortex-M4 CPU operating at up to 100MHz. This CMOS device offers 512KB of FLASH program memory and 131KB of data RAM. It includes integrated peripherals such as ADC channels, DAC channels, DMA channels, and PWM channels, enhancing its utility in complex control applications. The component operates within a temperature range of -40°C to 105°C and supports a supply voltage from 1.71V to 3.6V. Packaged in a 144-pin PBGA with a 1.00mm terminal pitch, the MK10DN512ZVMD10R is suitable for demanding applications in industrial automation, automotive systems, and consumer electronics.
Additional Information
Series: MK10DN512RoHS Status: RoHS CompliantManufacturer Lead Time: Product Status: NRFNDPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Width | 13.0000 |
| Technology | CMOS |
| Speed | 100.00000000 |
| Length | 13.0000 |
| ADC_Channels | Yes |
| Address_Bus_Width | 0 |
| Bit_Size | 32 |
| Clock_Frequency_Max | 32.0000000000000000 |
| CPU_Family | CORTEX-M4 |
| DAC_Channels | Yes |
| Data_RAM_Size | 131072 |
| DMA_Channels | Yes |
| External_Data_Bus_Width | 0 |
| JESD_30_Code | S-PBGA-B144 |
| Number_of_Terminals | 144 |
| Operating_Temperature_Max | 105.0000 |
| Operating_Temperature_Min | -40.0000 |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | LBGA |
| Package_Equivalence_Code | BGA144,12X12,40 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY, LOW PROFILE |
| Program_Memory_Size | 524288 |
| Program_Memory_Type | FLASH |
| Program_Memory_Width | 8 |
| PWM_Channels | Yes |
| Seated_Height_Max | 1.7000 |
| Supply_Voltage_Max | 3.6000 |
| Supply_Voltage_Min | 1.7100 |
| Supply_Voltage_Nom | 3.0000 |
| Surface_Mount | Yes |
| Terminal_Form | Ball |
| Terminal_Pitch | 1.000 |
| Terminal_Position | Bottom |
| uPs_uCs_Peripheral_ICs_Type | MICROCONTROLLER, RISC |
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