MCM5L4100AZ60
Fast Page DRAM, 4MX1, 60ns, CMOS, PZIP20Manufacturer: NXP Semiconductors
Categories: DRAMs
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NXP Semiconductors MCM5L4100AZ60 is a 4M x 1 Fast Page DRAM with a 60ns maximum access time. This CMOS component utilizes a separate I/O structure and features 3-state output characteristics. The memory organization is 4M words, with a total density of 4,194,304 bits. Designed with a plastic/epoxy rectangular package in a ZIG-ZAG in-line style, it offers through-hole termination with a 1.270mm terminal pitch. The MCM5L4100AZ60 operates within a temperature range of 0°C to 70°C and requires a nominal supply voltage of 5V. It supports 1024 refresh cycles and does not include self-refresh functionality. Common applications for this type of memory component include industrial control systems and legacy computing platforms.
Additional Information
Series: MCM5L4100RoHS Status: Manufacturer Lead Time: Product Status: Active-UnconfirmedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Technology | CMOS |
| Access_Time_Max | 60.0000000000000000 |
| I_O_Type | SEPARATE |
| JESD_30_Code | R-PZIP-T20 |
| Memory_Density | 4194304.0000000000000000 |
| Memory_IC_Type | FAST PAGE DRAM |
| Memory_Organization | 4MX1 |
| Memory_Width | 1 |
| Number_of_Terminals | 20 |
| Number_of_Words | 4194304.0000000000000000 |
| Number_of_Words_Code | 4M |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Output_Characteristics | 3-State |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | ZIP |
| Package_Equivalence_Code | ZIP20,.1 |
| Package_Shape | Rectangular |
| Package_Style | IN-LINE |
| Refresh_Cycles | 1024 |
| Self_Refresh | No |
| Standby_Current_Max | 0.000200000000000 |
| Supply_Current_Max | 120.000000000000000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | THROUGH-HOLE |
| Terminal_Pitch | 1.270 |
| Terminal_Position | ZIG-ZAG |
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