MCM5L4100AN80
Fast Page DRAM, 4MX1, 80ns, CMOS, PDSO20Manufacturer: NXP Semiconductors
Categories: DRAMs
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NXP Semiconductors MCM5L4100AN80 is a 4M x 1 Fast Page DRAM with an 80ns access time. This CMOS component utilizes a PDSO20 package (R-PDSO-J20) with a 1.27mm terminal pitch and J-bend terminal form. The memory organization is 4M words by 1 bit, offering a total density of 4,194,304 bits. It operates with a nominal supply voltage of 5V and features separate I/O with 3-state output characteristics. This surface-mount device requires 1024 refresh cycles and does not support self-refresh. The MCM5L4100AN80 is suitable for applications in industrial control and telecommunications.
Additional Information
Series: MCM5L4100RoHS Status: Manufacturer Lead Time: Product Status: Active-UnconfirmedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Technology | CMOS |
| Access_Time_Max | 80.0000000000000000 |
| I_O_Type | SEPARATE |
| JESD_30_Code | R-PDSO-J20 |
| Memory_Density | 4194304.0000000000000000 |
| Memory_IC_Type | FAST PAGE DRAM |
| Memory_Organization | 4MX1 |
| Memory_Width | 1 |
| Number_of_Terminals | 20 |
| Number_of_Words | 4194304.0000000000000000 |
| Number_of_Words_Code | 4M |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Output_Characteristics | 3-State |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | SOJ |
| Package_Equivalence_Code | SOJ20/26,.34 |
| Package_Shape | Rectangular |
| Package_Style | SMALL OUTLINE |
| Refresh_Cycles | 1024 |
| Self_Refresh | No |
| Standby_Current_Max | 0.000200000000000 |
| Supply_Current_Max | 85.000000000000000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | Yes |
| Terminal_Form | J BEND |
| Terminal_Pitch | 1.270 |
| Terminal_Position | Dual |
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