SAMV71N19A-AN
RISC Microcontroller, 32-Bit, FLASH, 300MHz, CMOS, PQFP100Manufacturer: Microchip Technology
Categories: Microcontrollers
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The Microchip Technology SAMV71N19 series SAMV71N19A-AN is a 32-bit ARM Cortex-M7 based RISC microcontroller. This QFP100 packaged device features 524KB of FLASH program memory and operates at speeds up to 300MHz. It offers extensive peripheral integration including multiple ADC and DAC channels, a suite of DMA channels, and PWM capabilities, supporting a wide range of industrial, automotive, and consumer electronics applications. The SAMV71N19A-AN operates within a supply voltage range of 3.0V to 3.6V and a temperature range of -40°C to 105°C. It includes 75 general-purpose I/O lines and supports an external data bus width of 16 bits. The component is manufactured on a CMOS technology process.
Additional Information
Series: SAMV71N19RoHS Status: Manufacturer Lead Time: Product Status: ActivePackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 14.0000 |
| Speed | 300.00000000 |
| Width | 14.0000 |
| Technology | CMOS |
| ADC_Channels | Yes |
| Address_Bus_Width | 24 |
| Bit_Size | 32 |
| Boundary_Scan | No |
| Clock_Frequency_Max | 20.0000000000000000 |
| DAC_Channels | Yes |
| DMA_Channels | Yes |
| External_Data_Bus_Width | 16 |
| JESD_30_Code | S-PQFP-G100 |
| Number_of_I_O_Lines | 75 |
| Number_of_Terminals | 100 |
| Operating_Temperature_Max | 105.0000 |
| Operating_Temperature_Min | -40.0000 |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | QFP |
| Package_Shape | Square |
| Package_Style | FlatPack |
| Program_Memory_Size | 524288 |
| Program_Memory_Type | FLASH |
| Program_Memory_Width | 8 |
| PWM_Channels | Yes |
| Screening_Level_Reference_Standard | TS 16949 |
| Seated_Height_Max | 1.6000 |
| Supply_Voltage_Max | 3.6000 |
| Supply_Voltage_Min | 3.0000 |
| Supply_Voltage_Nom | 3.3000 |
| Surface_Mount | Yes |
| Terminal_Form | Gull Wing |
| Terminal_Pitch | 0.500 |
| Terminal_Position | QUAD |
| uPs_uCs_Peripheral_ICs_Type | MICROCONTROLLER, RISC |
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