PIC32MX575F256H-V/MR
RISC Microcontroller, 32-Bit, FLASH, 80MHz, CMOS, PQCC64Manufacturer: Microchip Technology
Categories: Microcontrollers
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Microchip Technology's PIC32MX575F256H-V-MR is a 32-bit RISC microcontroller featuring 256KB of FLASH program memory and operating at up to 80MHz. This CMOS device offers 51 I/O lines, 12-bit ADC channels, and DMA channels, along with PWM capabilities. Designed for demanding applications, it supports a supply voltage range of 2.3V to 3.6V and operates within an industrial temperature range of -40°C to 105°C. The PQCC64 package, with a 0.50mm terminal pitch, is suitable for surface-mount assembly. This component finds application in automotive, industrial automation, and consumer electronics sectors, adhering to AEC-Q100 and TS 16949 standards.
Additional Information
Series: PIC32MX575F256RoHS Status: Manufacturer Lead Time: Product Status: ActivePackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Width | 9.0000 |
| Technology | CMOS |
| Speed | 80.00000000 |
| Length | 9.0000 |
| ADC_Channels | Yes |
| Address_Bus_Width | 0 |
| Bit_Size | 32 |
| Boundary_Scan | No |
| Clock_Frequency_Max | 50.0000000000000000 |
| DAC_Channels | No |
| DMA_Channels | Yes |
| External_Data_Bus_Width | 0 |
| JESD_30_Code | S-PQCC-N64 |
| Number_of_I_O_Lines | 51 |
| Number_of_Terminals | 64 |
| Operating_Temperature_Max | 105.0000 |
| Operating_Temperature_Min | -40.0000 |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | HVQCCN |
| Package_Shape | Square |
| Package_Style | CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE |
| Program_Memory_Size | 274432 |
| Program_Memory_Type | FLASH |
| Program_Memory_Width | 8 |
| PWM_Channels | Yes |
| Screening_Level_Reference_Standard | AEC-Q100; TS 16949 |
| Seated_Height_Max | 1.0000 |
| Supply_Voltage_Max | 3.6000 |
| Supply_Voltage_Min | 2.3000 |
| Supply_Voltage_Nom | 3.3000 |
| Surface_Mount | Yes |
| Terminal_Form | NO LEAD |
| Terminal_Pitch | 0.500 |
| Terminal_Position | QUAD |
| uPs_uCs_Peripheral_ICs_Type | MICROCONTROLLER, RISC |
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