PIC17LC44T-08/JW
RISC Microcontroller, 8-Bit, UVPROM, 8MHz, CMOS, CDIP40Manufacturer: Microchip Technology
Categories: Microcontrollers
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Microchip Technology's PIC17LC44T-08-JW is an 8-bit RISC microcontroller featuring a 16-bit architecture. This CMOS device operates at a maximum clock frequency of 8MHz and utilizes UVPROM for program storage, with a capacity of 8192 words. It offers 33 general-purpose I/O lines and a data RAM size of 454 bytes. Integrated peripherals include Power-on Reset (POR), two Pulse Width Modulation (PWM) channels, four timers, and a Watchdog Timer (WDT). Connectivity options are supported by a USART module. The component is housed in a 40-pin CDIP package with through-hole mounting and operates within a temperature range of 0°C to 70°C. This microcontroller is suitable for applications in industrial control and consumer electronics.
Additional Information
Series: PIC17LC44RoHS Status: RoHS CompliantManufacturer Lead Time: Product Status: ActivePackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Speed | 8.00000000 |
| Technology | CMOS |
| Connectivity | USART |
| Peripherals | POR, PWM(2), TIMER(4), WDT |
| ADC_Channels | No |
| Address_Bus_Width | 16 |
| Bit_Size | 8 |
| Clock_Frequency_Max | 8.0000000000000000 |
| DAC_Channels | No |
| Data_EEPROM_Size | 0 |
| Data_RAM_Size | 454 |
| DMA_Channels | No |
| External_Data_Bus_Width | 16 |
| JESD_30_Code | R-GDIP-T40 |
| Number_of_I_O_Lines | 33 |
| Number_of_Terminals | 40 |
| Operating_Temperature_Max | 70.0000 |
| Operating_Temperature_Min | 0.0000 |
| Package_Body_Material | CERAMIC, GLASS-SEALED |
| Package_Code | DIP |
| Package_Shape | Rectangular |
| Package_Style | IN-LINE |
| Program_Memory_Size | 8192 |
| Program_Memory_Type | UVPROM |
| Program_Memory_Width | 16 |
| PWM_Channels | Yes |
| Supply_Current_Max | 12.00000000 |
| Supply_Voltage_Max | 6.0000 |
| Supply_Voltage_Min | 2.5000 |
| Surface_Mount | No |
| Terminal_Form | THROUGH-HOLE |
| Terminal_Position | Dual |
| uPs_uCs_Peripheral_ICs_Type | MICROCONTROLLER, RISC |
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