PIC16LC72-02I/SP
RISC Microcontroller, 8-Bit, EPROM, 2MHz, CMOS, PDIP28Manufacturer: Microchip Technology
Categories: Microcontrollers
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Microchip Technology PIC16LC72-02I-SP is an 8-bit RISC microcontroller featuring EPROM program memory. This CMOS device operates at a clock frequency of up to 2MHz and offers 2048 words of program memory with a 14-bit program memory width. It includes 22 I/O lines and an integrated Analog-to-Digital Converter (ADC) with multiple channels, along with Pulse Width Modulation (PWM) capabilities. The PIC16LC72-02I-SP is housed in a 28-pin PDIP package with through-hole mounting. It supports a supply voltage range of 4.5V to 5.5V and operates within an extended industrial temperature range of -40°C to +85°C. This component finds application in various industrial and consumer electronics sectors.
Additional Information
Series: PIC16LC72RoHS Status: Manufacturer Lead Time: Product Status: Active-UnconfirmedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 34.6700 |
| Speed | 2.00000000 |
| Width | 7.6200 |
| Technology | CMOS |
| ADC_Channels | Yes |
| Address_Bus_Width | 0 |
| Bit_Size | 8 |
| Boundary_Scan | No |
| Clock_Frequency_Max | 20.0000000000000000 |
| DAC_Channels | No |
| DMA_Channels | No |
| External_Data_Bus_Width | 0 |
| JESD_30_Code | R-PDIP-T28 |
| Number_of_I_O_Lines | 22 |
| Number_of_Terminals | 28 |
| Operating_Temperature_Max | 85.0000 |
| Operating_Temperature_Min | -40.0000 |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | DIP |
| Package_Shape | Rectangular |
| Package_Style | IN-LINE |
| Program_Memory_Size | 2048 |
| Program_Memory_Type | EPROM |
| Program_Memory_Width | 14 |
| PWM_Channels | Yes |
| Screening_Level_Reference_Standard | TS 16949 |
| Seated_Height_Max | 4.0600 |
| Supply_Voltage_Max | 5.5000 |
| Supply_Voltage_Min | 4.5000 |
| Supply_Voltage_Nom | 5.0000 |
| Surface_Mount | No |
| Terminal_Form | THROUGH-HOLE |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Dual |
| uPs_uCs_Peripheral_ICs_Type | MICROCONTROLLER, RISC |
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