PIC16C56A-HSI/P301
RISC Microcontroller, 8-Bit, EPROM, PIC CPU, 40MHz, CMOS, PDIP18Manufacturer: Microchip Technology
Categories: Microcontrollers
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Microchip Technology presents the PIC16C56A-HSI-P301, an 8-bit RISC microcontroller featuring a PIC CPU architecture. This CMOS device operates at a maximum clock frequency of 20 MHz, with a speed rating of 40 MHz, and utilizes EPROM for its 1024-word program memory. The PIC16C56A-HSI-P301 is housed in an 18-lead PDIP package, suitable for through-hole mounting. Key peripherals include POR, a timer, and WDT. With 12 I/O lines and a supply voltage range of 5.0V to 5.5V, this component finds application in various industrial and consumer electronics segments. The operating temperature range is -40°C to 85°C.
Additional Information
Series: PIC16C56RoHS Status: RoHS CompliantManufacturer Lead Time: Product Status: Active-UnconfirmedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 22.8000 |
| Speed | 40.00000000 |
| Width | 7.6200 |
| Technology | CMOS |
| Peripherals | POR, TIMER, WDT |
| ADC_Channels | No |
| Address_Bus_Width | 0 |
| Bit_Size | 8 |
| Boundary_Scan | No |
| Clock_Frequency_Max | 20.0000000000000000 |
| CPU_Family | PIC |
| DAC_Channels | No |
| DMA_Channels | No |
| External_Data_Bus_Width | 0 |
| JESD_30_Code | R-PDIP-T18 |
| Number_of_DMA_Channels | 0 |
| Number_of_I_O_Lines | 12 |
| Number_of_Terminals | 18 |
| Number_of_Timers | 1 |
| Operating_Temperature_Max | 85.0000 |
| Operating_Temperature_Min | -40.0000 |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | DIP |
| Package_Shape | Rectangular |
| Package_Style | IN-LINE |
| Program_Memory_Size | 1024 |
| Program_Memory_Type | EPROM |
| Program_Memory_Width | 12 |
| PWM_Channels | No |
| Seated_Height_Max | 4.3200 |
| Supply_Voltage_Max | 5.5000 |
| Supply_Voltage_Min | 5.0000 |
| Supply_Voltage_Nom | 5.0000 |
| Surface_Mount | No |
| Terminal_Form | THROUGH-HOLE |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Dual |
| uPs_uCs_Peripheral_ICs_Type | MICROCONTROLLER, RISC |
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