MD51C68-35
Standard SRAM, 4KX4, 35ns, CMOS, CDIP20Manufacturer: Intel
Categories: SRAMs
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Intel MD51C68-35 is a 16Kb CMOS SRAM organized as 4K x 4 bits. This asynchronous memory component features a maximum access time of 35ns and operates from a 5V supply. The MD51C68 series device utilizes CMOS technology for low power consumption, with a standby current specified at 100mA maximum. This through-hole component is housed in a 20-lead Ceramic Dual In-line Package (CDIP20) with a 2.54mm terminal pitch. It supports a wide operating temperature range from -55°C to +125°C and is suitable for applications requiring ruggedized components, indicated by its compliance with MIL-STD-38535Q/M, MIL-STD-38534H, and MIL-STD-883B screening levels. The common I/O, 3-state output characteristics make it suitable for use in various industrial and defense systems.
Additional Information
Series: MD51C68RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Technology | CMOS |
| Access_Time_Max | 35.0000000000000000 |
| I_O_Type | COMMON |
| JESD_30_Code | R-XDIP-T20 |
| Memory_Density | 16384.0000000000000000 |
| Memory_IC_Type | STANDARD SRAM |
| Memory_Organization | 4KX4 |
| Memory_Width | 4 |
| Number_of_Terminals | 20 |
| Number_of_Words | 4096.0000000000000000 |
| Number_of_Words_Code | 4k |
| Operating_Mode | Asynchronous |
| Operating_Temperature_Max | 125.0 |
| Operating_Temperature_Min | -55.0 |
| Output_Characteristics | 3-State |
| Package_Body_Material | Ceramic |
| Package_Code | DIP |
| Package_Equivalence_Code | DIP20,.3 |
| Package_Shape | Rectangular |
| Package_Style | IN-LINE |
| Parallel_Serial | Parallel |
| Screening_Level_Reference_Standard | 38535Q/M;38534H;883B |
| Standby_Voltage_Min | 4.500000 |
| Supply_Current_Max | 100.000000000000000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | THROUGH-HOLE |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Dual |
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