TA5C180-75
UV PLD, 75ns, 48-Cell, CMOS, CPGA68Manufacturer: Intel
Categories: Programmable Logic Devices
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Intel TA5C180-75 is a CMOS UV Programmable Logic Device (PLD) from the TA5C180 series, featuring a 75ns propagation delay and 48 macrocells. This component utilizes a Ceramic Pin Grid Array (CPGA68) package with 68 terminals arranged in a square grid array. Operating within a temperature range of -40°C to +85°C, it requires a nominal supply voltage of 5V. The device is not in-system programmable and is designed for applications in industrial automation, telecommunications, and consumer electronics where non-volatile, high-speed logic implementation is critical. Its perpendicular pin form factor and 2.54mm terminal pitch facilitate robust board-level integration.
Additional Information
Series: TA5C180RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Technology | CMOS |
| Additional_Feature | No |
| In_System_Programmable | No |
| JESD_30_Code | S-XPGA-P68 |
| JTAG_BST | No |
| Number_of_Macro_Cells | 48 |
| Number_of_Terminals | 68 |
| Operating_Temperature_Max | 85.0 |
| Operating_Temperature_Min | -40.0 |
| Package_Body_Material | Ceramic |
| Package_Code | PGA |
| Package_Equivalence_Code | PGA68,11X11 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY |
| Programmable_Logic_Type | UV PLD |
| Propagation_Delay | 75.000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | PIN/PEG |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Perpendicular |
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