N5C180-70
OT PLD, 70ns, 48-Cell, CMOS, PQCC68Manufacturer: Intel
Categories: Programmable Logic Devices
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Intel N5C180-70 is a 70ns Offline Programmable Logic Device (OT PLD) from the N5C180 series. This CMOS device features 48 macrocells and 12 dedicated inputs, with 48 I/O lines available. It is housed in a 68-terminal PQCC68 package (JESD-30 Code: S-PQCC-J68) with a plastic/epoxy body. The device supports PAL blocks interconnected by a Programmable Interconnect Array (PIA), and offers 4 external clocks with asynchronous clocking capabilities. Its maximum clock frequency is 10.87 MHz, with a propagation delay of 70ns. Operating from a 4.75V to 5.25V supply, the N5C180-70 is suitable for surface-mount applications. Typical industries utilizing this component include industrial control and telecommunications.
Additional Information
Series: N5C180RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 24.2316 |
| Width | 24.2316 |
| Technology | CMOS |
| Additional_Feature | PAL BLOCKS INTERCONNECTED BY PIA; 4 EXTERNAL CLOCKS; ASYNCHRONOUS CLOCKS |
| Clock_Frequency_Max | 10.87000 |
| In_System_Programmable | No |
| JESD_30_Code | S-PQCC-J68 |
| JTAG_BST | No |
| Number_of_Dedicated_Inputs | 12 |
| Number_of_I_O_Lines | 48 |
| Number_of_Macro_Cells | 48 |
| Number_of_Terminals | 68 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 12 DEDICATED INPUTS, 48 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | QCCJ |
| Package_Equivalence_Code | LDCC68,1.0SQ |
| Package_Shape | Square |
| Package_Style | CHIP CARRIER |
| Programmable_Logic_Type | OT PLD |
| Propagation_Delay | 70.000 |
| Seated_Height_Max | 4.8300 |
| Supply_Voltage_Max | 5.25000 |
| Supply_Voltage_Min | 4.75000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | Yes |
| Terminal_Form | J BEND |
| Terminal_Pitch | 1.270 |
| Terminal_Position | QUAD |
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