EP2A25B724I8N
Loadable PLD, 1.94ns, 16-Cell, PLA-Type, PBGA724Manufacturer: Intel
Categories: Programmable Logic Devices
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Intel EP2A25B724I8N is a loadable PLD from the EP2A25 series, featuring a PLA-type architecture. This device offers 16 macrocells and 32 product terms, with a propagation delay of 1.94ns. It supports in-system programmability and JTAG boundary scan testing. The component is housed in a 724-ball PBGA package (JESD-30 code S-PBGA-B724) with a terminal pitch of 1.270mm, and measures 35x35mm with a maximum seated height of 3.5mm. With 536 I/O lines, it is designed for complex logic implementations. The operating temperature range is -40°C to 100°C, with a nominal supply voltage of 1.5V. This device finds application in various industrial, communication, and computing systems.
Additional Information
Series: EP2A25RoHS Status: Manufacturer Lead Time: Product Status: ActivePackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 35.0000 |
| Width | 35.0000 |
| Architecture | PLA-TYPE |
| Clock_Frequency_Max | 2040.81000 |
| In_System_Programmable | Yes |
| JESD_30_Code | S-PBGA-B724 |
| JTAG_BST | Yes |
| Number_of_I_O_Lines | 536 |
| Number_of_Inputs | 536 |
| Number_of_Macro_Cells | 16 |
| Number_of_Outputs | 536 |
| Number_of_Product_Terms | 32 |
| Number_of_Terminals | 724 |
| Operating_Temperature_Max | 100.0 |
| Operating_Temperature_Min | -40.0 |
| Organization | 536 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | BGA |
| Package_Equivalence_Code | BGA724,27X27,50 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY |
| Programmable_Logic_Type | LOADABLE PLD |
| Propagation_Delay | 1.940 |
| Seated_Height_Max | 3.5000 |
| Supply_Voltage_Max | 1.52500 |
| Supply_Voltage_Min | 1.42500 |
| Supply_Voltage_Nom | 1.5 |
| Surface_Mount | Yes |
| Terminal_Form | Ball |
| Terminal_Pitch | 1.270 |
| Terminal_Position | Bottom |
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