EP20K400EFC672-2XN
Loadable PLD, 1.83ns, CMOS, PBGA672Manufacturer: Intel
Categories: Programmable Logic Devices
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Intel EP20K400EFC672-2XN is a loadable PLD from the EP20K400 series, featuring a CMOS technology process. This device offers 488 I/O lines and 4 dedicated inputs, with an organization of 4 DEDICATED INPUTS and 488 I/O. The propagation delay is rated at 1.83 ns, supporting a maximum clock frequency of 160 MHz. Operating within a temperature range of 0°C to 85°C, it requires a supply voltage of 1.8V (nominal). The component is housed in a 672-ball grid array (BGA) package, specifically a PBGA672 with a 1.00 mm terminal pitch, measuring 27.00 mm by 27.00 mm. This device finds application in telecommunications, industrial control systems, and consumer electronics.
Additional Information
Series: EP20K400RoHS Status: RoHS CompliantManufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 27.0000 |
| Width | 27.0000 |
| Technology | CMOS |
| Clock_Frequency_Max | 160.00000 |
| JESD_30_Code | S-PBGA-B672 |
| Number_of_Dedicated_Inputs | 4 |
| Number_of_I_O_Lines | 488 |
| Number_of_Inputs | 480 |
| Number_of_Outputs | 480 |
| Number_of_Terminals | 672 |
| Operating_Temperature_Max | 85.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 4 DEDICATED INPUTS, 488 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | BGA |
| Package_Equivalence_Code | BGA672,26X26,40 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY |
| Programmable_Logic_Type | LOADABLE PLD |
| Propagation_Delay | 1.830 |
| Seated_Height_Max | 3.5000 |
| Supply_Voltage_Max | 1.89000 |
| Supply_Voltage_Min | 1.71000 |
| Supply_Voltage_Nom | 1.8 |
| Surface_Mount | Yes |
| Terminal_Form | Ball |
| Terminal_Pitch | 1.000 |
| Terminal_Position | Bottom |
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