EP20K100FC324-3N
Loadable PLD, 3.6ns, CMOS, PBGA324Manufacturer: Intel
Categories: Programmable Logic Devices
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Intel EP20K100FC324-3N is a Loadable PLD featuring CMOS technology. This component, part of the EP20K100 series, offers 252 I/O lines and 4 dedicated inputs, organized within a PBGA324 package with a terminal pitch of 1.000mm. With a maximum clock frequency of 100 MHz and a propagation delay of 3.6ns, it operates within a temperature range of 0°C to 85°C and a supply voltage of 2.375V to 2.625V. Its macrocell output function and suitability for surface mounting make it applicable in industrial automation, telecommunications, and consumer electronics. The component adheres to JESD-30 code S-PBGA-B324.
Additional Information
Series: EP20K100RoHS Status: RoHS CompliantManufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 19.0000 |
| Width | 19.0000 |
| Technology | CMOS |
| Clock_Frequency_Max | 100.00000 |
| JESD_30_Code | S-PBGA-B324 |
| Number_of_Dedicated_Inputs | 4 |
| Number_of_I_O_Lines | 252 |
| Number_of_Inputs | 246 |
| Number_of_Outputs | 246 |
| Number_of_Terminals | 324 |
| Operating_Temperature_Max | 85.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 4 DEDICATED INPUTS, 252 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | BGA |
| Package_Shape | Square |
| Package_Style | GRID ARRAY |
| Programmable_Logic_Type | LOADABLE PLD |
| Propagation_Delay | 3.600 |
| Seated_Height_Max | 3.5000 |
| Supply_Voltage_Max | 2.62500 |
| Supply_Voltage_Min | 2.37500 |
| Supply_Voltage_Nom | 2.5 |
| Surface_Mount | Yes |
| Terminal_Form | Ball |
| Terminal_Pitch | 1.000 |
| Terminal_Position | Bottom |
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