N27011-300V10
OTP ROM, 128KX8, 300ns, MOS, PQCC32Manufacturer: Intel
Categories: OTP ROMs
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The Intel N27011-300V10 is a 1Mbit One-Time Programmable (OTP) Read-Only Memory designed with MOS technology. This component features a memory organization of 128K words by 8 bits, providing a total density of 1048576 bits. Access time is rated at a maximum of 300ns. The N27011 series device is housed in a 32-terminal PQCC package (JESD-30 Code R-PQCC-J32) with J-bend terminals on a 1.270mm pitch, suitable for surface mounting. Its operating temperature range is from 0°C to 70°C. The I/O type is COMMON with 3-state output characteristics. This component finds application in various industrial and consumer electronics where non-volatile code or data storage is required.
Additional Information
Series: N27011RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Technology | MOS |
| Access_Time_Max | 300.0000000000000000 |
| I_O_Type | COMMON |
| JESD_30_Code | R-PQCC-J32 |
| Memory_Density | 1048576.0000000000000000 |
| Memory_IC_Type | OTP ROM |
| Memory_Organization | 128KX8 |
| Memory_Width | 8 |
| Number_of_Terminals | 32 |
| Number_of_Words | 131072.0000000000000000 |
| Number_of_Words_Code | 128K |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Output_Characteristics | 3-State |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | QCCJ |
| Package_Equivalence_Code | LDCC32,.5X.6 |
| Package_Shape | Rectangular |
| Package_Style | CHIP CARRIER |
| Surface_Mount | Yes |
| Terminal_Form | J BEND |
| Terminal_Pitch | 1.270 |
| Terminal_Position | QUAD |
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