82495XP
Cache Controller, 512K X 128, MOS, CPGA208Manufacturer: Intel
Categories: Memory Controllers
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Intel 82495XP is a high-performance MOS Cache Controller from the 82495 series. This component features a 512K x 128 memory organization and employs a 2-way set associative architecture with write-through operation to update main memory. It supports a 32-bit address bus and a 3-bit external data bus. Designed for I860 bus compatibility, the 82495XP operates at a maximum clock frequency of 50 MHz. The device is housed in a 208-pin Ceramic Pin Grid Array (CPGA) package, specified for an operating temperature range of 0°C to 85°C. It includes boundary scan capabilities. This controller is utilized in demanding applications such as high-performance computing and graphics processing.
Additional Information
Series: 82495RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 49.8500 |
| Width | 49.8500 |
| Technology | MOS |
| Additional_Feature | 2 WAY SET ASSOCIATIVE; WRITE THROUGH TO UPDATE MAIN MEMORY; OPTEMP SPECIFIED AS TC |
| Address_Bus_Width | 32 |
| Boundary_Scan | Yes |
| Bus_Compatibility | I860 |
| Clock_Frequency_Max | 50.0000000000000000 |
| External_Data_Bus_Width | 3 |
| JESD_30_Code | S-CPGA-P208 |
| Low_Power_Mode | No |
| Memory_Organization | 512K X 128 |
| Number_of_Terminals | 208 |
| Operating_Temperature_Max | 85.0000 |
| Operating_Temperature_Min | 0.0000 |
| Package_Body_Material | CERAMIC, METAL-SEALED COFIRED |
| Package_Code | PGA |
| Package_Equivalence_Code | PGA208,17X17 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY |
| Seated_Height_Max | 4.5700 |
| Supply_Current_Max | 600.00000000 |
| Supply_Voltage_Max | 5.2500 |
| Supply_Voltage_Min | 4.7500 |
| Supply_Voltage_Nom | 5.0000 |
| Surface_Mount | No |
| Terminal_Form | PIN/PEG |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Perpendicular |
| uPs_uCs_Peripheral_ICs_Type | MEMORY CONTROLLER, CACHE |
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