EP1S60F672C5
Field Programmable Gate Array, 57120-Cell, CMOS, PBGA672Manufacturer: Intel
Categories: Field Programmable Gate Arrays
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Intel EP1S60F672C5 is a CMOS Field Programmable Gate Array from the EP1S60 series. This device features 57,120 logic cells within 5,712 CLBs, offering significant logic density for complex designs. It operates with a nominal supply voltage of 1.5V, ranging from 1.425V to 1.575V. The component is housed in a 672-terminal PBGA package with a terminal pitch of 1.00mm, conforming to the S-PBGA-B672 JESD-30 code. The package dimensions are 27.0mm x 27.0mm with a maximum seated height of 3.50mm. The maximum combinatorial delay of a CLB is rated at 7.495 ns. This FPGA is well-suited for applications in telecommunications, industrial automation, and high-performance computing. It is designed for surface mounting.
Additional Information
Series: EP1S60RoHS Status: Manufacturer Lead Time: Product Status: ActivePackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 27.0000 |
| Width | 27.0000 |
| Technology | CMOS |
| Combinatorial_Delay_of_a_CLB_Max | 7.4950000000000000 |
| JESD_30_Code | S-PBGA-B672 |
| Number_of_CLBs | 5712 |
| Number_of_Logic_Cells | 57120 |
| Number_of_Terminals | 672 |
| Operating_Temperature_Max | 85.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 5712 CLBS |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | BGA |
| Package_Equivalence_Code | BGA672,26X26,40 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY |
| Programmable_Logic_Type | FIELD PROGRAMMABLE GATE ARRAY |
| Seated_Height_Max | 3.5000 |
| Supply_Voltage_Max | 1.57500 |
| Supply_Voltage_Min | 1.42500 |
| Supply_Voltage_Nom | 1.5 |
| Surface_Mount | Yes |
| Terminal_Form | Ball |
| Terminal_Pitch | 1.000 |
| Terminal_Position | Bottom |
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