P51C259L-12
Static Column DRAM, 64KX4, 120ns, CMOS, PDIP18Manufacturer: Intel
Categories: DRAMs
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Intel P51C259L-12 is a 64K x 4 Static Column DRAM with a 120ns access time. This CMOS component, part of the P51C259 series, features a 262,144 bit density and operates with a nominal 5V supply. The memory organization is 64K words by 4 bits, supporting 256 refresh cycles. Designed with a PDIP18 package (JESD-30 Code R-PDIP-T18), it offers through-hole mounting with a 2.54mm terminal pitch. This device is suitable for applications requiring high-speed memory access within the 0°C to 70°C operating temperature range. Its 3-state output characteristics and common I/O type make it a versatile option for various electronic systems.
Additional Information
Series: P51C259RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Technology | CMOS |
| Access_Time_Max | 120.0000000000000000 |
| I_O_Type | COMMON |
| JESD_30_Code | R-PDIP-T18 |
| Memory_Density | 262144.0000000000000000 |
| Memory_IC_Type | STATIC COLUMN DRAM |
| Memory_Organization | 64KX4 |
| Memory_Width | 4 |
| Number_of_Terminals | 18 |
| Number_of_Words | 65536.0000000000000000 |
| Number_of_Words_Code | 64k |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Output_Characteristics | 3-State |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | DIP |
| Package_Equivalence_Code | DIP18,.3 |
| Package_Shape | Rectangular |
| Package_Style | IN-LINE |
| Refresh_Cycles | 256 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | THROUGH-HOLE |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Dual |
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