N21256-15
Page Mode DRAM, 256KX1, 150ns, MOS, PQCC18Manufacturer: Intel
Categories: DRAMs
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Intel N21256-15, a Page Mode DRAM from the N21256 series, offers a memory organization of 256K x 1 with a maximum access time of 150ns. This MOS technology component features separate I/O and 3-state output characteristics, operating within a temperature range of 0°C to 70°C. The component is housed in an 18-terminal plastic PQCC package, designed for surface mounting. With a memory density of 262,144 bits, it is suitable for applications requiring cost-effective memory solutions in areas such as consumer electronics and industrial control systems.
Additional Information
Series: N21256RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Technology | MOS |
| Access_Time_Max | 150.0000000000000000 |
| I_O_Type | SEPARATE |
| JESD_30_Code | R-PQCC-J18 |
| Memory_Density | 262144.0000000000000000 |
| Memory_IC_Type | PAGE MODE DRAM |
| Memory_Organization | 256KX1 |
| Memory_Width | 1 |
| Number_of_Terminals | 18 |
| Number_of_Words | 262144.0000000000000000 |
| Number_of_Words_Code | 256k |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Output_Characteristics | 3-State |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | QCCJ |
| Package_Equivalence_Code | LDCC18,.33X.53 |
| Package_Shape | Rectangular |
| Package_Style | CHIP CARRIER |
| Refresh_Cycles | 256 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | Yes |
| Terminal_Form | J BEND |
| Terminal_Pitch | 1.270 |
| Terminal_Position | QUAD |
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