MPM5130GC-2
Mask PLD, 45ns, CMOS, CPGA100Manufacturer: Altera
Categories: Programmable Logic Devices
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The Altera MPM5130GC-2 is a Mask Programmable Logic Device (PLD) from the MPM5130 series, featuring a CMOS technology and packaged in a 100-pin Ceramic Pin Grid Array (CPGA). This device offers 128 macrocells organized with 8 interconnected LABs (Logic Array Blocks) and 19 dedicated input lines, supporting up to 64 I/O lines. It operates with a nominal supply voltage of 5V, within a range of 4.75V to 5.25V, and has a maximum clock frequency of 40 MHz. The propagation delay is rated at 45 ns. This component is suitable for applications in telecommunications and industrial control systems requiring high-density, fixed-function programmable logic. The component features one external clock input and shared input/clock capabilities.
Additional Information
Series: MPM5130RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 33.5280 |
| Width | 33.5280 |
| Technology | CMOS |
| Additional_Feature | LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK |
| Clock_Frequency_Max | 40.00000 |
| JESD_30_Code | S-CPGA-P100 |
| Number_of_Dedicated_Inputs | 19 |
| Number_of_I_O_Lines | 64 |
| Number_of_Terminals | 100 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 19 DEDICATED INPUTS, 64 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | CERAMIC, METAL-SEALED COFIRED |
| Package_Code | WPGA |
| Package_Shape | Square |
| Package_Style | GRID ARRAY, WINDOW |
| Programmable_Logic_Type | MASK PLD |
| Propagation_Delay | 45.000 |
| Seated_Height_Max | 4.9530 |
| Supply_Voltage_Max | 5.25000 |
| Supply_Voltage_Min | 4.75000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | No |
| Terminal_Form | PIN/PEG |
| Terminal_Pitch | 2.540 |
| Terminal_Position | Perpendicular |
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