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MPM1810LC-25

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MPM1810LC-25

Mask PLD, 28ns, CMOS, PQCC68

Manufacturer: Altera

Categories: Programmable Logic Devices

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The Altera MPM1810LC-25 is a Mask Programmable Logic Device (PLD) from the MPM1810 series. This CMOS device features 48 macrocells and supports 4 external clocks with shared input/clock functionality. It offers 12 dedicated inputs and 48 I/O lines, providing 48 macrocells for flexible logic implementation. Designed for surface mounting, it comes in a 68-terminal PQCC package (JESD-30 Code S-PQCC-J68) with J-bend terminals on a 1.270mm pitch. The device operates within a supply voltage range of 4.75V to 5.25V and has a maximum clock frequency of 40 MHz. Its propagation delay is rated at 28 ns. Applications for this component are found in industrial automation, consumer electronics, and telecommunications.

Additional Information

Series: MPM1810RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:
Technical Details:
Width24.2316
TechnologyCMOS
Length24.2316
Additional_Feature48 MACROCELLS; 4 EXTERNAL CLOCKS; SHARED INPUT/CLOCK
Clock_Frequency_Max40.00000
JESD_30_CodeS-PQCC-J68
Number_of_Dedicated_Inputs12
Number_of_I_O_Lines48
Number_of_Terminals68
Operating_Temperature_Max70.0
Operating_Temperature_Min0.0
Organization12 DEDICATED INPUTS, 48 I/O
Output_FunctionMACROCELL
Package_Body_MaterialPLASTIC/EPOXY
Package_CodeQCCJ
Package_Equivalence_CodeLDCC68,1.0SQ
Package_ShapeSquare
Package_StyleCHIP CARRIER
Programmable_Logic_TypeMASK PLD
Propagation_Delay28.000
Seated_Height_Max4.5720
Supply_Voltage_Max5.25000
Supply_Voltage_Min4.75000
Supply_Voltage_Nom5
Surface_MountYes
Terminal_FormJ BEND
Terminal_Pitch1.270
Terminal_PositionQUAD

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