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EPM9480GC280-12

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EPM9480GC280-12

EE PLD, 12.8ns, CMOS, CPGA280

Manufacturer: Altera

Categories: Programmable Logic Devices

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Altera EPM9480 series EE PLD, part number EPM9480GC280-12, offers 480 macrocells and 676 configurable flip-flops. This CMOS device features a maximum clock frequency of 125 MHz and a propagation delay of 12.8 ns. It supports configurable I/O operation at 3.3V or 5V, with a nominal supply voltage of 5V (4.75V to 5.25V). The component is housed in a 280-pin Ceramic Pin Grid Array (CPGA) package, specifically a square, metal-sealed cofired package with a terminal pitch of 2.54mm. It provides 196 I/O lines. Applications for this device include industrial automation, telecommunications infrastructure, and consumer electronics.

Additional Information

Series: EPM9480RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:
Technical Details:
Width49.7800
TechnologyCMOS
Length49.7800
Additional_Feature480 MACROCELLS; 676 FLIP FLOPS CONFIGURABLE I/O OPERATION (3.3V OR 5V)
Clock_Frequency_Max125.00000
JESD_30_CodeS-CPGA-P280
Number_of_Dedicated_Inputs0
Number_of_I_O_Lines196
Number_of_Terminals280
Operating_Temperature_Max70.0
Operating_Temperature_Min0.0
Organization0 DEDICATED INPUTS, 196 I/O
Output_FunctionMACROCELL
Package_Body_MaterialCERAMIC, METAL-SEALED COFIRED
Package_CodePGA
Package_Equivalence_CodePGA280,19X19
Package_ShapeSquare
Package_StyleGRID ARRAY
Programmable_Logic_TypeEE PLD
Propagation_Delay12.800
Seated_Height_Max5.0810
Supply_Voltage_Max5.25000
Supply_Voltage_Min4.75000
Supply_Voltage_Nom5
Surface_MountNo
Terminal_FormPIN/PEG
Terminal_Pitch2.540
Terminal_PositionPerpendicular

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