EPM9400RC208-15N
EE PLD, 16.2ns, CMOS, PQFP208Manufacturer: Altera
Categories: Programmable Logic Devices
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Altera EPM9400RC208-15N is an EE PLD from the EPM9400 series, featuring a 16.2ns propagation delay and CMOS technology. This device provides 580 flip-flops and supports configurable I/O operation at 3.3V or 5V. It offers 135 I/O lines within a 208-terminal PQFP package (S-PQFP-G208). The maximum clock frequency is 117.60000 MHz, with a supply voltage range of 4.75V to 5.25V. Designed for surface mounting, this component is suitable for applications in industrial automation, telecommunications, and consumer electronics. The package dimensions are 28.00mm x 28.00mm with a terminal pitch of 0.500mm.
Additional Information
Series: EPM9400RoHS Status: RoHS CompliantManufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 28.0000 |
| Width | 28.0000 |
| Technology | CMOS |
| Additional_Feature | 580 FLIP FLOPS; CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| Clock_Frequency_Max | 117.60000 |
| JESD_30_Code | S-PQFP-G208 |
| Number_of_Dedicated_Inputs | 0 |
| Number_of_I_O_Lines | 135 |
| Number_of_Inputs | 139 |
| Number_of_Outputs | 135 |
| Number_of_Terminals | 208 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 0 DEDICATED INPUTS, 135 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | FQFP |
| Package_Shape | Square |
| Package_Style | FLATPACK, FINE PITCH |
| Programmable_Logic_Type | EE PLD |
| Propagation_Delay | 16.200 |
| Seated_Height_Max | 4.1000 |
| Supply_Voltage_Max | 5.25000 |
| Supply_Voltage_Min | 4.75000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | Yes |
| Terminal_Form | Gull Wing |
| Terminal_Pitch | 0.500 |
| Terminal_Position | QUAD |
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