EPM9320ABC356-7
EE PLD, 8.2ns, 320-Cell, CMOS, PBGA356Manufacturer: Altera
Categories: Programmable Logic Devices
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The Altera EPM9320ABC356-7 is an EE PLD from the EPM9320 series, featuring 320 macrocells and a propagation delay of 8.2ns. This CMOS device operates with a supply voltage range of 4.75V to 5.25V and is housed in a 356-pin PBGA package. It offers 168 I/O lines and supports configurable I/O operation at 3.3V or 5V. The EPM9320ABC356-7 includes JTAG Boundary Scan Test (BST) functionality and is in-system programmable. This component is suitable for applications in telecommunications, industrial control, and computing systems.
Additional Information
Series: EPM9320RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 35.0000 |
| Width | 35.0000 |
| Technology | CMOS |
| Additional_Feature | 320 MACROCELLS; 484 FLIP-FLOPS; 20 LABS; CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| In_System_Programmable | Yes |
| JESD_30_Code | S-PBGA-B356 |
| JTAG_BST | Yes |
| Number_of_Dedicated_Inputs | 0 |
| Number_of_I_O_Lines | 168 |
| Number_of_Macro_Cells | 320 |
| Number_of_Terminals | 356 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 0 DEDICATED INPUTS, 168 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | HLBGA |
| Package_Equivalence_Code | BGA356,26X26,50 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY, HEAT SINK/SLUG, LOW PROFILE |
| Programmable_Logic_Type | EE PLD |
| Propagation_Delay | 8.200 |
| Seated_Height_Max | 1.6300 |
| Supply_Voltage_Max | 5.25000 |
| Supply_Voltage_Min | 4.75000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | Yes |
| Terminal_Form | Ball |
| Terminal_Pitch | 1.270 |
| Terminal_Position | Bottom |
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