EPM7512BFI256-6
EE PLD, 6ns, 512-Cell, CMOS, PBGA256Manufacturer: Altera
Categories: Programmable Logic Devices
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The Altera EPM7512BFI256-6 is an EE PLD from the EPM7512 series, featuring a 6ns propagation delay and 512 macrocells. This CMOS device operates with a nominal supply voltage of 2.5V, ranging from 2.375V to 2.625V. It offers 212 I/O lines and utilizes a 256-ball PBGA package (JESD-30 code S-PBGA-B256) with a 1.000mm terminal pitch. With a maximum clock frequency of 147.1 MHz, this in-system programmable device supports JTAG BST. Its organization includes 0 dedicated inputs and 212 I/O lines, with macrocells functioning as the output. This surface-mount component is suitable for applications in industrial automation, telecommunications, and consumer electronics.
Additional Information
Series: EPM7512RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 17.0000 |
| Width | 17.0000 |
| Technology | CMOS |
| Additional_Feature | Yes |
| Clock_Frequency_Max | 147.10000 |
| In_System_Programmable | Yes |
| JESD_30_Code | S-PBGA-B256 |
| JTAG_BST | Yes |
| Number_of_Dedicated_Inputs | 0 |
| Number_of_I_O_Lines | 212 |
| Number_of_Macro_Cells | 512 |
| Number_of_Terminals | 256 |
| Organization | 0 DEDICATED INPUTS, 212 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | BGA |
| Package_Equivalence_Code | BGA256,16X16,40 |
| Package_Shape | Square |
| Package_Style | GRID ARRAY |
| Programmable_Logic_Type | EE PLD |
| Propagation_Delay | 6.000 |
| Seated_Height_Max | 2.1000 |
| Supply_Voltage_Max | 2.62500 |
| Supply_Voltage_Min | 2.37500 |
| Supply_Voltage_Nom | 2.5 |
| Surface_Mount | Yes |
| Terminal_Form | Ball |
| Terminal_Pitch | 1.000 |
| Terminal_Position | Bottom |
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