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Programmable Logic Devices

EPM7256SQC208-7F

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EPM7256SQC208-7F

EE PLD, 7.5ns, 256-Cell, CMOS, PQFP208

Manufacturer: Altera

Categories: Programmable Logic Devices

Quality Control: Learn More

The Altera EPM7256SQC208-7F is an EE PLD from the EPM7256 series. This device features 256 macrocells and supports configurable I/O operation with 3.3V or 5V logic. With a maximum clock frequency of 166.7 MHz and a propagation delay of 7.5 ns, it offers 164 I/O lines within a 208-terminal PQFP package (JESD-30 Code S-PQFP-G208). This in-system programmable device is constructed using CMOS technology and is suitable for applications requiring flexible logic allocation and high-speed operation, including telecommunications, industrial control, and computing systems. The device operates within a temperature range of 0°C to 70°C and a supply voltage of 4.75V to 5.25V.

Additional Information

Series: EPM7256RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:
Technical Details:
Width28.0000
TechnologyCMOS
Length28.0000
Additional_Feature256 MACROCELLS; 16 LABS; CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V
Clock_Frequency_Max166.70000
In_System_ProgrammableYes
JESD_30_CodeS-PQFP-G208
JTAG_BSTYes
Number_of_Dedicated_Inputs0
Number_of_I_O_Lines164
Number_of_Inputs168
Number_of_Macro_Cells256
Number_of_Outputs164
Number_of_Terminals208
Operating_Temperature_Max70.0
Operating_Temperature_Min0.0
Organization0 DEDICATED INPUTS, 164 I/O
Output_FunctionMACROCELL
Package_Body_MaterialPLASTIC/EPOXY
Package_CodeFQFP
Package_Equivalence_CodeQFP208,1.2SQ,20
Package_ShapeSquare
Package_StyleFLATPACK, FINE PITCH
Programmable_Logic_TypeEE PLD
Propagation_Delay7.500
Seated_Height_Max4.1000
Supply_Voltage_Max5.25000
Supply_Voltage_Min4.75000
Supply_Voltage_Nom5
Surface_MountYes
Terminal_FormGull Wing
Terminal_Pitch0.500
Terminal_PositionQUAD

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