EPM7256RC208-20
OT PLD, 20ns, 256-Cell, CMOS, PQFP208Manufacturer: Altera
Categories: Programmable Logic Devices
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Altera EPM7256RC208-20 is an OT PLD from the EPM7256 series. This CMOS device features 256 macrocells with shared input/clock capabilities, offering a propagation delay of 20ns and a maximum clock frequency of 62.5 MHz. It provides 160 I/O lines and has 0 dedicated inputs. The component is housed in a 208-terminal PQFP package with a terminal pitch of 0.500mm and gull wing terminals. Operating within a temperature range of 0°C to 70°C, it requires a supply voltage between 4.75V and 5.25V. This surface-mount component is utilized in various industrial and telecommunications applications.
Additional Information
Series: EPM7256RoHS Status: Manufacturer Lead Time: Product Status: DiscontinuedPackaging: Datasheet:Download Free CAD Model:
Technical Details:
| Length | 28.0000 |
| Width | 28.0000 |
| Technology | CMOS |
| Additional_Feature | 256 MACROCELLS; SHARED INPUT/CLOCK |
| Clock_Frequency_Max | 62.50000 |
| In_System_Programmable | No |
| JESD_30_Code | S-PQFP-G208 |
| JTAG_BST | No |
| Number_of_Dedicated_Inputs | 0 |
| Number_of_I_O_Lines | 160 |
| Number_of_Macro_Cells | 256 |
| Number_of_Terminals | 208 |
| Operating_Temperature_Max | 70.0 |
| Operating_Temperature_Min | 0.0 |
| Organization | 0 DEDICATED INPUTS, 160 I/O |
| Output_Function | MACROCELL |
| Package_Body_Material | PLASTIC/EPOXY |
| Package_Code | FQFP |
| Package_Equivalence_Code | QFP208,1.2SQ,20 |
| Package_Shape | Square |
| Package_Style | FLATPACK, FINE PITCH |
| Programmable_Logic_Type | OT PLD |
| Propagation_Delay | 20.000 |
| Seated_Height_Max | 4.0700 |
| Supply_Voltage_Max | 5.25000 |
| Supply_Voltage_Min | 4.75000 |
| Supply_Voltage_Nom | 5 |
| Surface_Mount | Yes |
| Terminal_Form | Gull Wing |
| Terminal_Pitch | 0.500 |
| Terminal_Position | QUAD |
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